DFT Engineer

TL;DR

DFT Engineer: Responsible for various aspects of Design-for-Test (DFT), including MBIST and scan insertion, ATPG, ATE pattern development, and yield analysis for semiconductor solutions. Focus on collaborating with design, verification, and ATE teams to ensure robust silicon bring-up and improve DFT design methodology.

Location: Onsite in Austin, Texas, USA

Salary: $108,000 - $172,800 annually

Company

hirify.global is a global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Work on block and chip-level DFT implementation, including lint checking, MBIST architecture, logic, and scan insertion.
• Perform ATPG and pattern simulation for MBIST and scan.
• Develop ATE patterns, manage hand-off, and perform silicon debugging.
• Collaborate with ATE engineers on yield improvement and analysis.
• Engage with design, verification, and implementation teams during DFT design.
• Enhance DFT design methodology across cross-functional teams.

Requirements

• BSEE with 8+ years or MSEE with 6+ years of relevant experience required.
• Required experience in silicon bring-up and yield improvement.
• Solid understanding of DFT techniques, including RTL lint checking, scan compression, scan insertion, and ATPG.
• Experience in MBIST architecture and insertion.
• Proficiency with Mentor Tessent/Synopsys DFT and simulation tools.
• Strong knowledge of digital logic fundamentals and scripting (Perl or similar).

Culture & Benefits

• Competitive and comprehensive benefits package including Medical, dental, and vision plans.
• 401(K) participation with company matching.
• Employee Stock Purchase Program (ESPP).
• Employee Assistance Program (EAP).
• Company-paid holidays, paid sick leave, and vacation time.
• Commitment to being an equal opportunity employer.