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Analog & RF IC Senior Layout Engineer (Analog/RF IC)

109 700 - 175 500$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Analog & RF IC Senior Layout Engineer (Analog/RF IC): Translating complex schematics into DRC/LVS-clean layouts for high-speed custom analog and digital IP blocks, with an accent on floorplanning, precision device matching, critical-net routing, and advanced FinFET nodes. Focus on taking top-level and IP blocks through integration, verification, tape-out, and sign-off while solving complex parasitic and high-frequency layout challenges.

Location: USA-CA Irvine Alton Parkway Bldg 2

Annual base salary: USD 109,700–175,500, plus a discretionary annual bonus and equity awards.

Company

hirify.global develops high-tech hardware and silicon products, including wireless, wireline, and AI hardware.

What you will do

  • Translate circuit schematics into DRC/LVS-clean layouts for critical custom IP blocks.
  • Collaborate with circuit designers on floorplanning, power and ground architecture, and precision device matching.
  • Use Cadence Virtuoso, Virtuoso VXL, Mentor Calibre, and other EDA tools for high-speed custom circuit layout and verification.
  • Route critical nets and optimize device matching for high-frequency performance.
  • Support schedule assessments and top-level integration across the silicon design cycle.
  • Own custom top-level and IP blocks from initial floorplanning through final tape-out and sign-off.

Requirements

  • Extensive experience laying out high-speed custom analog and digital circuits such as TX, RX, SerDes, and PLLs.
  • Deep familiarity with the Cadence Virtuoso tool suite, Virtuoso VXL, and Mentor Calibre verification.
  • Proven design and layout experience in advanced FinFET technology nodes.
  • Strong understanding of layout fundamentals and the ability to solve complex circuit layout challenges.
  • BS in Electrical Engineering or a related field with 8+ years of related experience, or MS with 6+ years.

Culture & Benefits

  • Close collaboration with circuit designers and engineering teams.
  • Work on advanced silicon and analog/mixed-signal layout challenges.
  • Medical, dental, and vision plans.
  • 401(k) participation with company matching, ESPP, EAP, paid holidays, paid sick leave, vacation, and applicable family leave.

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