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9 часов назад

Staff Engineer (ASIC/VLSI Synthesis and Design)

115 200 - 170 390$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Мэтч & Сопровод

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Описание вакансии

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TL;DR

Staff Engineer (ASIC/VLSI Synthesis and Design): Developing and validating timing constraints and front-end implementation flows for complex SoC designs with an accent on synthesis, STA, and timing closure. Focus on optimizing power, performance, and area (PPA) for advanced technology nodes like 5nm/4nm in high-speed silicon environments.

Location: Must be based in San Diego, CA

Salary: $115,200 - $170,390 per annum

Company

hirify.global is a leader in semiconductor solutions, building the essential infrastructure for data centers, cloud, and AI architectures.

What you will do

  • Develop and validate timing constraints for intricate SoC designs.
  • Collaborate with Architecture, RTL, DFT, and Analog teams to define timing modes and constraints.
  • Own front-end implementation tasks including synthesis, UPF development, and Logical Equivalence Checks (LEC).
  • Analyze power, performance, and area tradeoffs to drive chip implementation.
  • Perform Physical Aware Synthesis using industry-standard tools like Fusion Compiler.
  • Automate front-end flows using scripting languages such as Tcl or Python.

Requirements

  • Must be eligible to access export-controlled information under U.S. law.
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field.
  • 3-5 years of professional experience in ASIC implementation and synthesis.
  • Strong understanding of ASIC design flows from RTL to GDSII.
  • Hands-on experience with synthesis, STA methodologies, and timing closure.
  • Proficiency in scripting languages like Tcl or Perl.

Nice to have

  • Experience with advanced technology nodes such as TSMC N4/N5.
  • Experience with functional ECOs using Conformal ECO.
  • Experience with UPF development and validation using Conformal Low Power (CLP).

Culture & Benefits

  • Comprehensive financial well-being programs including an employee stock purchase plan.
  • Robust mental health resources and family support programs.
  • Commitment to diversity and inclusion in the workplace.
  • Opportunities to work on transformative, industry-leading data infrastructure technology.

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