Назад
Company hidden
16 часов назад

Senior Photonics Design Engineer, Actives Design

190 610 - 269 100$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Senior Photonics Design Engineer (Actives Design): Design, simulate, and develop photonic components (modulators, high-speed detectors, phase control, diodes) for silicon photonics platforms with an accent on high-speed design for 50+ Gbaud applications and PIC architecture. Focus on tolerance analysis, test chip execution, data-driven optimizations, and research into novel photonic technologies.

Location: On-site presence required in Santa Clara, California, US

Salary: $190,610 - $269,100

Company

hirify.global Integrated Photonics Solutions (IPS) leads silicon photonics integration and commercialization for data center and AI bandwidth growth.

What you will do

  • Design, simulate, and develop active photonic components like modulators, detectors, and diodes, influencing PIC architecture.
  • Perform tolerance analysis and optimize components for performance, power, area, and reliability.
  • Lead end-to-end test chip execution: design, layout, tape-out, and validation.
  • Analyze characterization data to identify gaps and implement improvements.
  • Develop modeling methodologies, propose test approaches, conduct research, and drive IP development.

Requirements

  • PhD in Electrical Engineering, Physics or similar + 4+ years experience and 6+ years in silicon photonic design, simulation, testing.
  • 4+ years in high-speed design for 50+ Gbaud modulators/detectors in silicon/III-V.
  • Proficiency in simulation tools: Sentaurus, Silvaco, Lumerical, HFSS, ADS, RSoft etc.
  • Hands-on with photonic test equipment: spectrum analyzers, tunable lasers, etc.
  • Expertise in PIC data analysis with JMP, MATLAB/Python; familiarity with Cadence, KLayout.

Nice to have

  • Silicon photonic microring modulator expertise (MRM, BTO, TFLN, III/V).
  • High-speed electronic ICs, modulator drivers, TIAs, DSPs.
  • Optical modulator bias control systems, system-level modeling.
  • 100G+ components, foundry processes (AIM, GlobalFoundries, TSMC).
  • Publications, customer-facing or product experience.

Culture & Benefits

  • Competitive pay, stock bonuses, health, retirement, vacation benefits.
  • On-site work model in Santa Clara.
  • Part of Data Center Group focusing on Xeon solutions, HPC, AI systems.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →