Senior Layout Engineer (SiGe BiCMOS/CMOS)

TL;DR

Senior Layout Engineer (SiGe BiCMOS/CMOS): Developing high-quality physical layouts for advanced integrated circuits used in optical transceiver solutions with an accent on performance optimization and manufacturability. Focus on implementing full-custom layouts for high-speed analog and mixed-signal IC blocks, including transmit, receive, and clocking circuits.

Location: Berlin, Germany

Company

hirify.global develops innovative semiconductor and optical networking technologies for data center, telecom, and cloud infrastructure applications.

What you will do

• Develop full-custom layout for high-speed analog and mixed-signal IC blocks using SiGe BiCMOS and CMOS technologies.
• Implement layouts for optical transceiver building blocks, including transmit, receive, bias, and clocking circuits.
• Optimize layout for performance, matching, parasitics, area, and manufacturability.
• Perform physical verification, including DRC, LVS, ERC, and parasitic extraction.
• Contribute to floorplanning and block integration across the design flow.

Requirements

• Master’s degree in Electrical Engineering or a related field.
• 2–3 years of professional IC layout experience.
• Hands-on experience with full-custom layout in SiGe BiCMOS and CMOS.
• Exposure to high-speed analog/mixed-signal design, ideally in optical transceiver applications.
• Proficiency with industry-standard CAD and physical verification tools.

Culture & Benefits

• International and multicultural work environment.
• Strong team-oriented and friendly company culture.
• Flexible working hours model.
• Internal training programs for professional growth.
• Perks including kindergarten allowance, free drinks, and fruits.
• Edenred non-cash benefit card and employee discounts.