SOC Design Verification Engineer (x86)

TL;DR

SOC Design Verification Engineer (SystemVerilog/UVM): Performing functional logic verification of integrated SoCs to ensure designs meet specifications with an accent on scalable verification plans and test benches. Focus on replicating and debugging presilicon issues, analyzing power and performance, and collaborating with architects to improve complex microarchitectural features.

Location: Hybrid (Fort Collins, Colorado, US)

Salary: $105,650 - $172,860

Company

hirify.global is a global leader in designing and manufacturing silicon products that power digital lives across a wide range of devices and data centers.

What you will do

• Perform functional logic verification of integrated SoCs to ensure design specifications are met.
• Develop scalable and reusable verification plans, test benches, and environments using SystemVerilog and UVM.
• Execute emulation and system simulation models to uncover bugs and analyze power and performance.
• Root cause and debug issues in the presilicon environment and implement corrective measures.
• Collaborate with SoC architects and RTL developers to optimize complex microarchitectural features.
• Integrate security activities and regression tests into the verification lifecycle.

Requirements

• Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science.
• 1+ years of experience with SystemVerilog and UVM.
• 2+ years of experience using Python for test automation.
• Proficiency in C/C++ and scripting languages such as Perl, Tcl, or Shell.
• Experience with pre-silicon verification, Linux/Unix environments, and version control (Git, Perforce).
• Knowledge of regression testing and CI/CD pipelines.

Nice to have

• Experience with simulation tools such as VCS, Xcelium, or Questa.
• Knowledge of formal verification tools and coverage analysis.
• Familiarity with x86 SoC architectures and AMBA protocols (AXI, AHB, APB).
• Experience with memory subsystems, cache coherency, and power management.
• Knowledge of high-speed interfaces including PCIe, DDR, USB, and Ethernet.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Hybrid work model allowing split time between on-site and off-site work.
• Opportunity to work on cutting-edge x86 and AI-accelerated systems.