Principal Package Design Engineer (Semiconductor Packaging)

TL;DR

Principal Package Design Engineer (Semiconductor Packaging): Developing and optimizing new semiconductor package designs for discrete and power components with an accent on robust, manufacturable, and cost-effective assembly. Focus on lead frame design, alignment with JEDEC/AEC standards, and improving package competitiveness through statistical analysis.

Location: Seremban, Malaysia

Company

hirify.global is a leading semiconductor manufacturer specializing in discrete, logic, and MOSFET components.

What you will do

• Lead lead frame package design for NPI and mass production phases to ensure alignment with manufacturing requirements.
• Develop technical assembly drawings in close collaboration with Package Architects.
• Define dimensions and tolerances based on assembly capability, package technology, and fabrication rules.
• Ensure compliance with JEDEC and AEC-Q100/Q101 automotive industry standards.
• Evaluate high-precision metal manufacturing processes, including progressive die stamping and chemical etching.
• Identify cost reduction opportunities and drive initiatives to improve overall package competitiveness.

Requirements

• Bachelor’s or master’s degree in Mechanical, Electronics, Manufacturing Engineering, or a related discipline.
• Minimum 6+ years of experience in lead frame design or semiconductor packaging design.
• Proficiency in AutoCAD and SolidWorks.
• Experience with statistical tools and methodologies such as Minitab, DOE, and FMEA.
• Fluent English communication skills (verbal and written).
• Strong knowledge of die attach, wire bonding, and molding/encapsulation processes.

Culture & Benefits

• Commitment to diversity and inclusion with a goal of 30% women in management by 2030.
• Access to employee resource groups, including Pride Network and global/local Women's groups.
• Inclusive and accessible recruitment process for all applicants.
• Safe work environment with reasonable adjustments provided upon request.