Principal Layout Engineer (Analog/RF)

TL;DR

Principal Layout Engineer (Analog/RF): Leading a team of analog layout engineers to design physical layouts for high-impact microcontrollers and RF components with an accent on multi-node process integration. Focus on designing for high-volume silicon production, ensuring performance and power requirements are met across nodes from 140nm to 16nm.

Location: Catania, Italy (Onsite)

Company

Global leader in secure connectivity solutions for embedded applications serving the automotive, industrial & IoT, and mobile markets.

What you will do

• Lead a team of analog layout engineers responsible for the physical design of analog blocks and systems.
• Manage the layout of Analog and RF components for MCU, NFC, UWB, and BT/BLE products.
• Execute designs across multiple process nodes and foundries, including CMOS, BCD, FD-SOI, and FinFET (140nm to 16nm).
• Collaborate closely with analog design engineers to ensure seamless integration and meet performance, power, and area requirements.
• Perform layout verification (DRC, LVS) and sign-off, delivering physical models (LEF, Libs) to IC teams.
• Develop and maintain layout scripts and automation tools to drive team innovation.

Requirements

• MSEE/BSEE or equivalent professional qualification.
• 10+ years of experience in the layout of analog blocks and systems.
• Proven track record of delivering working silicon for high-volume products.
• Experience leading global teams of engineers.
• Proficiency in analog layout tools such as Cadence Virtuoso and Siemens Calibre.
• Deep knowledge of device physics, layout matching, parasitics, ESD, and latch-up fundamentals.

Culture & Benefits

• Access to extensive online and offline learning opportunities for core and professional skill development.
• Inclusive work environment with strong commitments to diversity, equality, and sustainability.
• Opportunity to work on cutting-edge AI at the Edge technology within a world-class engineering team.