Sr. Staff Engineer, Packaging Engineering (Semiconductor)

TL;DR

Sr. Staff Engineer, Packaging Engineering (Semiconductor): Driving semiconductor IC package development from concept to mass production with an accent on New Product Introduction (NPI) and flip-chip technology. Focus on optimizing package design for manufacturability, performance, and reliability while managing OSAT and substrate suppliers.

Location: Hsinchu City, Taiwan

Company

hirify.global provides essential semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Define optimal package solutions based on end-client requirements and semiconductor product specifications.
• Provide design inputs for manufacturability, supply, performance, cost, quality, and reliability.
• Manage OSAT and substrate suppliers regarding risk assessment, design review, BOM, and process.
• Drive NPI schedules to achieve critical milestone dates for package development.
• Collaborate with QA and suppliers to resolve package-related quality and reliability issues.
• Support the package technology roadmap and the development of new packaging technologies.

Requirements

• Bachelor's in Mechanical Engineering and Material Science (5-7 years exp) or Master's/PhD in related fields (3-5 years exp).
• Professional experience in semiconductor packaging, specifically with substrate, RDL, and assembly.
• Expertise in flip-chip package development and substrate review.
• Proficiency in Cadence APD and AutoCAD.
• Knowledge of 2D, 2.5D, 3D, and wafer-level packaging.
• Must be eligible to access export-controlled information as defined under U.S. export control laws.

Culture & Benefits

• Competitive compensation and comprehensive benefits package.
• Environment of shared collaboration, transparency, and inclusivity.
• Access to tools and resources for professional growth and development.