Principal ASIC Physical Design Engineer (Aerospace)

TL;DR

Principal ASIC Physical Design Engineer (Aerospace): Leading the implementation of complex SoCs for next-generation satellite and space systems with an accent on RTL-to-GDSII flow and PPA optimization. Focus on driving timing closure across multiple process corners and managing external physical design partners for first-pass silicon success.

Location: Remote (United States). Must be a "U.S. Person" per ITAR regulations.

Salary: $190,000 – $280,000 + equity

Company

hirify.global is a Series C startup building the highest-power satellite platforms ever flown to unlock performance across every orbit.

What you will do

• Own the complete RTL-to-GDSII flow including synthesis, floorplanning, place & route, CTS, STA, and physical verification.
• Develop and maintain physical design methodologies, scripts, and automation to optimize performance, power, and area (PPA).
• Drive timing closure across multiple voltage and process corners, including sign-off with foundry-qualified tools.
• Manage and technically guide external physical design partners and service vendors to ensure quality standards.
• Partner with package, SI/PI, and test teams for package-aware floorplanning and chip-to-board integration.
• Support chip bring-up, debug, and the product through production and spaceflight.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of experience in ASIC physical design for high-performance SoCs.
• Proven end-to-end expertise in RTL-to-GDSII flows using industry tools like Synopsys, Cadence, or Siemens.
• Hands-on experience with timing closure, IR drop analysis, and ECO implementation in advanced FinFET process nodes.
• Must be a "U.S. Person" (citizen, lawful permanent resident, etc.) to comply with ITAR export control regulations.

Nice to have

• Exposure to radiation-hardened or space-qualified ASICs.
• Experience with chip-package co-design or advanced packaging (2.5D/3D).
• Experience driving tapeouts through TSMC or using Gate-All-Around technologies.
• Experience working in cross-functional, geographically distributed teams.

Culture & Benefits

• Comprehensive benefits package including medical, dental, and vision coverage.
• Paid time off, paid parental leave, and life insurance.
• Equity ownership in a groundbreaking space startup.
• Opportunity to build state-of-the-art mixed-signal SoCs for deep space missions.