Design Verification Engineer (Semiconductors)

TL;DR

Design Verification Engineer (Semiconductors): Developing and verifying high-speed connectivity PHY devices for AI and cloud infrastructure with an accent on UVM and SystemVerilog-based verification environments. Focus on building testbench infrastructure, implementing mixed-signal design verification, and optimizing digital/analog micro-architectures.

Location: Santa Clara, CA

Salary: $81,880 - $122,600 per annum

Company

hirify.global provides essential semiconductor solutions for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

• Build and maintain state-of-the-art UVM and SystemVerilog-based verification environments.
• Develop test suites and new features for optical PHY modules (1.6T and 3.2T).
• Collaborate with Analog, Digital Design, and Systems/DSP teams to verify mixed-signal designs.
• Apply Object-Oriented Programming (OOP) to enhance verification infrastructure and APIs.
• Implement modern formal verification techniques and manage functional coverage.

Requirements

• Bachelor's degree in Electrical Engineering or a related field.
• Coursework in Digital Logic Design (Verilog), Computer Architecture, and Digital Signal Processing.
• Knowledge of Electrical Circuit Analysis.
• Course projects using OOP languages such as C/C++ or Java.
• Hands-on project experience with Verilog, VHDL, or SystemVerilog.
• Must be eligible to access export-controlled information under U.S. law (EAR).

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Comprehensive family support and mental/physical health resources.
• Financial well-being programs and recognition awards.
• Supportive environment for early-career engineers to learn AI-ML hardware revolution.