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2 дня назад

Senior CPU Physical Design Engineer

141 910 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Senior CPU Physical Design Engineer: Qualify and validate PDK versions and standard cell libraries using backend design flows for RTL2GDS, including synthesis, APR, and custom verification. Focus on executing full CPU physical design flow with floorplanning, place and route, static timing analysis, power analysis, reliability, and noise analysis to optimize high-performance, low-power CPUs.

Location: US, Texas, Austin (hybrid work model: split time between on-site at hirify.global site and off-site)

Salary: $141,910–$269,100

Company

Silicon and Platform Engineering Group delivering breakthrough silicon and platform solutions for next-generation computing experiences.

What you will do

  • Qualify and validate new PDK versions and standard cell libraries using RTL2GDS flows and custom verification.
  • Conduct signoff processes including formal equivalence, static timing analysis, reliability, DRC/LVS, noise, and electromigration checks.
  • Manage design data repositories and execute full physical design flow: synthesis, floorplanning, place and route, power analysis.
  • Collaborate with logic, circuit, and design automation teams to improve CPU microarchitectures.
  • Work with EDA vendors to enhance tools and methodologies for high-speed, low-power CPUs.
  • Develop scripts to automate design implementation, verification, and quality analysis.

Requirements

  • Bachelor's in Computer/Electrical Engineering with 5+ years experience or Master's with 3+ years
  • 6+ years in physical design tools: Synopsys Fusion Compiler, Cadence Genus/Innovus, Primetime or similar
  • 4+ years performing regression tests and validation of PDK, standard cell libraries, backend tools
  • 4+ years hands-on with TCL, Perl, Python, and source code management
  • 2+ years design database management with Perforce, Git or similar

Nice to have

  • Expertise in CAD tools for chip-level physical design verification, ERC, STA for worst-case corners
  • Familiarity with machine learning for design optimization and co-pilot tools for analysis/debug
  • Strong communication and collaboration across teams/geographies
  • Continuous learning attitude and analytical skills for complex challenges

Culture & Benefits

  • Competitive pay, stock bonuses, health, retirement, and vacation benefits
  • Hybrid work model splitting on-site and off-site time
  • Commitment to innovation, diverse teams, and ethical hiring practices

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