ASIC Implementation Engineer (AI)

TL;DR

ASIC Implementation Engineer (AI): Building next generation AI designs from netlist to silicon tape-out with an accent on timing closure, EM/IR analysis, and top-level floorplanning. Focus on executing physical verification, optimizing clock tree synthesis, and ensuring successful silicon delivery.

Location: Must work in person at the San Jose site; no remote work allowed

Salary: $120,000 - $192,000

Company

A global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Execute physical design, physical verification, and timing closure for AI-focused ASIC products.
• Perform EM/IR analysis, place and route, and clock tree synthesis with a focus on skew balancing and insertion reduction.
• Manage top-level floor-planning and layout processes.
• Develop and optimize physical design flows and methodologies.
• Collaborate closely with IC Design RTL Engineers to achieve tape-out.

Requirements

• Bachelor’s degree in Electrical Engineering or Electronics Engineering.
• 8+ years of relevant experience in physical design.
• Full physical design cycle experience from RTL to Tape-out.
• Proficiency in EDA tools and scripting languages such as TCL and PERL.
• Excellent verbal and written communication skills.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(K) plan with company matching.
• Competitive new hire equity grants and annual equity awards.
• Employee Stock Purchase Program (ESPP).
• Paid sick leave, vacation time, and company-paid holidays.