Lead Design Engineer (SOC Design)

Location: Shanghai

Company

Electronic design automation software and engineering solutions for SOC and IP design projects.

What you will do

• Develop and execute verification plans for SOC and IP blocks, ensuring design intent and testability.
• Perform RTL verification using SystemVerilog, UVM, and industry-standard verification methodologies.
• Collaborate with design engineers to debug complex issues and optimize verification strategies.
• Work with customer and internal engineering teams to deliver high-quality project support.
• Conduct coverage analysis, regression testing, and verification-goal closure.
• Develop and enhance verification environments and reusable testbenches.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 3–5 years of hands-on experience in VLSI/SOC design verification.
• Strong expertise in SystemVerilog, UVM, and verification tools.
• Hands-on experience with at least one protocol such as AMBA, PCIe, USB, MIPI, or DDR/LPDDR.
• Ability to collaborate with design and verification teams and bridge communication between local teams and global stakeholders.

Nice to have

• ARM or RISC-V processor integration experience.

Culture & Benefits

• Full-time position based in Shanghai.
• Opportunity to work on SOC design projects for leading customers.
• Collaboration with local engineering teams, customers, and global stakeholders.
• Environment focused on leadership, innovation, and solving complex technology problems.