Sr Staff Analog Modeling/Verification Engineer

TL;DR

Sr Staff Analog Modeling/Verification Engineer: Creating Verilog/SystemVerilog behavioral models of analog circuits for high-speed optical PHY transceivers with an accent on functional verification and simulation. Focus on developing programming sequences, supporting model integration, and running AMS simulations to ensure leaf cell functionality.

Location: San Diego, CA (onsite). This position may require access to U.S. export-controlled technology; applicants must be eligible under applicable law.

Salary: $135,900 - $201,130 per annum

Company

hirify.global provides semiconductor solutions for data infrastructure in enterprise, cloud, AI, and carrier architectures, including high-speed optical transceivers for datacenters.

What you will do

• Create Verilog/SystemVerilog behavioral models of analog circuits.
• Develop programming sequences to verify analog circuit behaviors.
• Provide support to analog model users for model bring-up and integration.
• Perform AMS simulations to verify leaf cell functionality.

Requirements

• MS in Computer/Electrical Engineering with 5+ years of relevant industry experience.
• Good understanding of CMOS analog circuit design.
• Verilog/SystemVerilog modeling of analog circuit functional behaviors.
• Strong EDA tool experience, such as Cadence Virtuoso.
• Hands-on experience using Cadence tools for analog mixed-signal design verification.
• Basic scripting skills, such as Python.
• Good communication skills to interact with design teams.

Culture & Benefits

• Comprehensive benefits including financial well-being (employee stock purchase plan), family support, mental/physical health resources, and recognition awards.
• Opportunity to shape the technical DNA and culture of hirify.global's expanding San Diego design organization.
• Work with outstanding collaborators on innovative, first-to-market products addressing high data rate demands.