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обновлено 8 дней назад

Field Application Engineer Intern (Hardware)

Формат работы
onsite
Тип работы
fulltime
Грейд
trainee
Английский
b2
Страна
China
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Field Application Engineer Intern (Hardware) (PAM4/Optical): Supporting customer schematic and layout reviews, lab bring-up, performance testing, and hardware/software debugging for optical interconnect products with an accent on PAM4 DSP, Coherent DSP, TIA, driver, and SerDes technologies. Focus on SI/PI simulations, tuning customer products, debugging system-level issues, and supporting customer engagements under senior FAE guidance.

Location: Shanghai, Suzhou, or Wuhan, China; internship conducted at hirify.global Shanghai, Suzhou, or Wuhan offices.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, carrier, and optical data infrastructure applications.

What you will do

  • Assist senior FAEs with customer schematic and layout reviews for PAM4 DSP, Coherent DSP, driver, and TIA components in optical modules, AEC, NPO, XPO, and CPO products.
  • Support signal integrity and power integrity simulations.
  • Participate in lab activities to tune and optimize customer products and improve performance.
  • Support product bring-up, evaluation, performance testing, and hardware/software debugging.
  • Assist with debugging issues in customer systems and contribute to customer support.
  • Create and maintain technical documentation, FAQs, and internal training materials.

Requirements

  • Currently pursuing a Master’s or Ph.D. degree in Integrated Circuit Design and Integrated System, Integrated Circuit Science and Engineering, Electronic Information Engineering, or a related field.
  • Strong willingness to learn, effective communication skills, and a collaborative mindset.
  • Availability to commit to an internship period of at least 4–6 months or longer.

Nice to have

  • Fundamental understanding of or research experience with AMS high-speed SerDes, such as PAM4.
  • Knowledge of analog TIA and driver chip design.
  • Knowledge of optical communication systems.

Culture & Benefits

  • Hands-on experience with PAM4 and Coherent ODSP technologies.
  • Practical exposure to system-level bring-up and hardware/software co-debugging.
  • Mentorship and technical guidance from experienced FAEs and U.S. engineering teams.
  • Opportunity to learn about SerDes DSPs using 5nm, 3nm, and 2nm process nodes for 112G, 224G, and 448G applications.
  • Full-time offer opportunity after successful internship completion and assessment.
  • Collaborative, transparent, and inclusive work environment with compensation and benefits.

Hiring process

  • Successful interns may receive a full-time offer after completing the internship with satisfactory performance and passing the assessment.
  • Applicants must comply with interview integrity requirements prohibiting unauthorized AI tools during interviews.
  • Access to export-controlled technology may require an export license review before employment.

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