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6 часов назад

Senior Staff System & Modeling Engineer (Wireline Communications)

133 600 - 178 100CAD
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior Staff System & Modeling Engineer (Wireline Communications): Architect and model end-to-end wireline communication systems using MATLAB, Simulink, SystemVerilog, C/C++, and Python with an accent on DSP techniques and behavioral modeling of analog and mixed-signal blocks. Focus on devising novel DSP methods, capturing key impairments like jitter and noise, and supporting verification for ultra-high-speed interconnects.

Location: Toronto, Canada (onsite)

Salary: 133,600 - 178,100 CAD per annum

Company

hirify.global’s semiconductor solutions are the essential building blocks of data infrastructure for enterprise, cloud, AI, and carrier architectures.

What you will do

  • Architect and model end-to-end wireline systems for modeling, verification, and architectural exploration.
  • Develop novel DSP techniques to enhance performance of ultra-high-speed wireline systems.
  • Create accurate behavioral models of analog blocks capturing non-idealities like bandwidth limits, jitter, noise, and distortion.
  • Collaborate with system architects on design trade-offs and system specifications.
  • Model analog/mixed-signal circuits (CTLEs, ADCs, PLLs, TX/RX) using SystemVerilog for verification and integration.
  • Align models with analog designers and SI engineers, support lab testing, silicon bring-up, and mentor juniors.

Requirements

  • PhD or Master’s in Electrical Engineering, Computer Engineering, or related field.
  • 5-10+ years in system modeling and analog abstraction for wireline communication systems.
  • Solid knowledge of DSP and equalization techniques (CTLE, FFE, DFE) for high-speed wireline.
  • Strong understanding of analog/mixed-signal circuit behavior.
  • Experience with SerDes standards like PCIe, UCIe, or high-speed protocols.
  • Proficiency in SystemVerilog, Verilog, MATLAB, Simulink, C/C++, Python, scripting; excellent problem-solving and communication skills.
  • Position in Toronto, Canada; may require U.S. export control eligibility and license review (U.S. citizens, permanent residents, or protected individuals preferred).

Culture & Benefits

  • Competitive compensation with additional elements.
  • Collaborative, transparent, inclusive environment.
  • Tools and resources for success, growth, and development.

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