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4 часа Π½Π°Π·Π°Π΄

Silicon Packaging Design Engineer

Π€ΠΎΡ€ΠΌΠ°Ρ‚ Ρ€Π°Π±ΠΎΡ‚Ρ‹
hybrid
Π’ΠΈΠΏ Ρ€Π°Π±ΠΎΡ‚Ρ‹
fulltime
Π“Ρ€Π΅ΠΉΠ΄
middle
Английский
b2
Π‘Ρ‚Ρ€Π°Π½Π°
Malaysia
Вакансия ΠΈΠ· списка Hirify.GlobalВакансия ΠΈΠ· Hirify RU Global, списка ΠΊΠΎΠΌΠΏΠ°Π½ΠΈΠΉ с восточно-СвропСйскими корнями
Для мэтча ΠΈ ΠΎΡ‚ΠΊΠ»ΠΈΠΊΠ° Π½ΡƒΠΆΠ΅Π½ Plus

ΠœΡΡ‚Ρ‡ & Π‘ΠΎΠΏΡ€ΠΎΠ²ΠΎΠ΄

Для мэтча с этой вакансиСй Π½ΡƒΠΆΠ΅Π½ Plus

ОписаниС вакансии

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TL;DR

Silicon Packaging Design Engineer (Semiconductor/EDA): Designing the physical layout of silicon for advanced packaging technology with an accent on area optimization, signal, and power routing. Focus on executing layout verification processes, ensuring DFM compliance, and optimizing reliability metrics for high-performance semiconductors.

Location: Hybrid in Penang, Malaysia

Company

hirify.global is a global leader in semiconductor manufacturing, focusing on cutting-edge silicon process and packaging technology for the AI era.

What you will do

  • Develop custom layouts for silicon used in advanced packaging technology.
  • Perform detailed physical array planning, area optimization, and signal/power routing.
  • Design and verify standard cell libraries in compliance with design rules and PDK specifications.
  • Execute layout verification for reliability metrics, including electromigration, IR drop, self-heat, and ESD.
  • Collaborate with electrical engineers to optimize performance, reliability, and manufacturability.
  • Develop and drive innovative layout methodologies to improve productivity and quality.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
  • 4+ years of experience in layout design (or 3+ years with a Master's degree).
  • Proficiency in Cadence Virtuoso Layout Suite and other industry-standard EDA tools.
  • Strong understanding of analog device and metal layout fundamentals, DFM, and reliability verification.
  • Experience in full-chip top metal/analog routing design and tape-in assembly.
  • Must be based in Penang, Malaysia for a hybrid work arrangement.

Nice to have

  • Proven ability to solve complex technical problems and troubleshoot EDA tool/methodology issues.
  • Knowledge of floor planning tools, library integration, and design archiving processes.
  • Strong communication skills for cross-functional collaboration.

Culture & Benefits

  • Hybrid work model allowing a balance between on-site and off-site work.
  • Opportunity to work within a world-class team of semiconductor professionals.
  • Supportive, inclusive, and dynamic professional environment.
  • Commitment to ethical hiring practices and RBA compliance.

Π‘ΡƒΠ΄ΡŒΡ‚Π΅ остороТны: Ссли Ρ€Π°Π±ΠΎΡ‚ΠΎΠ΄Π°Ρ‚Π΅Π»ΡŒ просит Π²ΠΎΠΉΡ‚ΠΈ Π² ΠΈΡ… систСму, ΠΈΡΠΏΠΎΠ»ΡŒΠ·ΡƒΡ iCloud/Google, ΠΏΡ€ΠΈΡΠ»Π°Ρ‚ΡŒ ΠΊΠΎΠ΄/ΠΏΠ°Ρ€ΠΎΠ»ΡŒ, Π·Π°ΠΏΡƒΡΡ‚ΠΈΡ‚ΡŒ ΠΊΠΎΠ΄/ПО, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡ‚Π΅ этого - это мошСнники. ΠžΠ±ΡΠ·Π°Ρ‚Π΅Π»ΡŒΠ½ΠΎ ΠΆΠΌΠΈΡ‚Π΅ "ΠŸΠΎΠΆΠ°Π»ΠΎΠ²Π°Ρ‚ΡŒΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡˆΠΈΡ‚Π΅ Π² ΠΏΠΎΠ΄Π΄Π΅Ρ€ΠΆΠΊΡƒ. ΠŸΠΎΠ΄Ρ€ΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β†’