Power Management Integrated Circuit (PMIC) Controls Engineer

TL;DR

Power Management Integrated Circuit (PMIC) Controls Engineer: Developing algorithms for power sequencing, voltage scaling, and control loops for PMICs used in AI compute applications with an accent on stability, system-level strategies, and analog/mixed-signal circuit design. Focus on designing, simulating, verifying, and integrating power management blocks including LDOs, switching regulators, and gate drivers from concept to production.

Location: Hybrid, minimum of 3 days a week in the office in Torrance, CA.

Salary: $180,000-$220,000

Company

Early-stage startup innovating at the intersection of power and compute, building advanced semiconductor power management solutions to improve AI compute capacity, efficiency, and reliability.

What you will do

• Develop algorithms for power sequencing, voltage scaling, and control loops ensuring stability for PMICs.
• Collaborate with multi-disciplinary teams on specifications, design, characterization, verification, and documentation.
• Perform transistor-level circuit design, simulation, and verification of power management blocks like LDOs, buck/boost converters, and voltage references.
• Supervise layout designers, guide floor planning, and resolve DRC/LVS errors.
• Work with PCB layout and packaging teams to ensure design performance and quality.
• Draft datasheets, conduct design reviews, and contribute to next-generation product development.

Requirements

• Bachelor’s degree in electrical engineering with 3+ years of experience in analog/mixed-signal IC design.
• Must have released at least one full IC design from concept to production.
• Strong background in power management, circuit design principles, buck/switching topologies, control theory (PWM/PFM), gate drivers, PLLs.
• Knowledge of semiconductor processes (BCD, FinFET), device physics, and reliability.
• Proficiency in Cadence IC design tools and familiarity with SPI, I2C, PMBus/SMBus.
• Strong analytical, problem-solving, communication, and prioritization skills.

Nice to have

• Master’s degree or higher.
• Digital control theory, Matlab/Simulink, Verilog/VHDL modeling.
• Experience with layout design, review, and LVS verification.

Culture & Benefits

• Open-minded, fast-paced, problem-solving team valuing dialogue, candor, and transformational thinking.
• 100% employer-paid comprehensive health care (medical, dental, vision) for family, mental health benefits.
• Paid maternity/paternity leave (14 weeks at normal pay), unlimited PTO with approval.
• Optional 401K, FSA, equity incentives, professional development opportunities.