Package Design Engineer
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
TL;DR
Package Design Engineer (Advanced Packaging): Lead Si/package/PCB/system co-design for photonic fabric BU with an accent on multi-chip SiP packaging, high-speed interfaces, and 2.5D/3D architectures. Focus on package layout, SI/PI optimization, substrate design, and vendor collaboration for reliability and manufacturability.
Location: Santa Clara, CA or Chandler, AZ
Salary: $166,520 - $249,500 per annum
Company
’s semiconductor solutions are essential building blocks for data infrastructure in enterprise, cloud, AI, and carrier architectures.
What you will do
- Lead Si/package/PCB/system co-design, collaborating with ASIC and system teams to develop reusable packages across performance points.
- Scope package design feasibility for silicon interposer and substrate in multi-chip SiP.
- Handle package layout including routing, reliability, thermal, mechanical, SI/PI, manufacturability, and high-speed interfaces like HBM, DDR, PCIe, 56G/112G SerDes.
- Plan and execute 2.5D/3D interposer and RDL layouts with netlist management for chiplet assemblies.
- Engage substrate vendors and OSATs for production, assembly, qualification, failure analysis, and innovation in advanced packaging.
Requirements
- BS/MS/PhD in EE/ECE/MSE/ME/ChemE or related.
- 5-10 years in semiconductor packaging design for heterogeneous architectures including silicon interposer and RDL.
- Extensive experience with Cadence APD and MCAD tools like SolidWorks, AutoCAD.
- Knowledge of 2.5D/3D technologies (InFO, CoWoS, FoCoS, EMIB), SI/PI, thermal/mechanical, DFM, reliability.
- Proven vendor/OSAT engagement for manufacturing, yield, assembly.
- Strong analytical, problem-solving, collaboration, project management skills.
Nice to have
- Familiarity with photonics packaging.
Culture & Benefits
- Comprehensive benefits including financial well-being (employee stock purchase plan), family support, mental/physical health resources, recognition awards.
- Opportunity to impact innovation in data infrastructure.
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