Sr. Principal Si/Pi Engineer

TL;DR

Sr. Principal SI/PI Engineer: Optimizing and verifying test chip package designs and evaluation boards for high-speed IP products with an accent on SI/PI performance. Focus on providing channel models, design guidelines, and customer support for ASIC performance.

Location: San Jose

Salary: $154,000 to $286,000

Company

hirify.global Design Systems hires and develops leaders and innovators who want to make an impact on the world of technology.

What you will do

• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results, providing feedback to ensure optimal IP performance in their ASIC.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.

Requirements

• M.S. or Ph.D. in Electrical Engineering (or similar degree).
• 3+ years of experience preferably working with high speed SerDes and PHYs.
• Good understanding of high speed SerDes architecture.
• Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave.
• Experience with IBIS-AMI model simulations.

Culture & Benefits

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• Variety of medical, dental and vision plan options.