PCB Layout Engineer (AI)

TL;DR

PCB Layout Engineer (AI): Designing high-performance multi-layer PCBs for cutting-edge AI hardware and RISC-V CPUs with an accent on high-speed interfaces and advanced fabrication. Focus on optimizing signal integrity, power delivery, and manufacturability for data centers, workstations, and consumer products.

Location: Hybrid; must be based in Santa Clara, CA (USA) or Toronto, ON (Canada)

Salary: $100,000 – $500,000 (including base and variable compensation)

Company

hirify.global is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency through the development of high-performance RISC-V CPUs.

What you will do

• Own multi-layer PCB layouts for high-performance computing and AI hardware.
• Route high-speed interfaces including GDDR, LPDDR, DDR, PCIe Gen 5/6, and Ethernet.
• Define and apply layout rules for physical spacing and length-matching in high-speed designs.
• Collaborate with systems, power, signal integrity, and mechanical engineers to meet PDN, SI, thermal, and regulatory requirements.
• Work with fabricators on stackups and resolve DFM/DFA/DFT feedback for mass production.
• Select appropriate advanced fabrication technologies (HDI, blind/buried vias, VIPPO, back drilling) balancing performance and cost.

Requirements

• ~8+ years of experience in PCB design using Cadence Allegro.
• B.S. in Electrical Engineering, Computer Science, or equivalent experience.
• Strong background in high-layer count, HDI, multi-lamination, and back drilling.
• Proficiency with Cadence schematic/layout tools (v25.1) in the Cadence Pulse environment.
• Must be based in Santa Clara, CA or Toronto, ON.
• Must be eligible to access U.S. export-controlled technology (EAR compliance).

Nice to have

• Experience with Altium Designer.

Culture & Benefits

• Opportunity to build a from-scratch, high-performance RISC-V CPU and AI-first compute platform.
• Collaborative environment valuing curiosity and a commitment to solving hard technical problems.
• Competitive compensation package and comprehensive benefits.
• Direct impact on the roadmap of a fast-growing AI silicon and systems company.