SoC Physical Design Verification Engineer (AI)

TL;DR

SoC Physical Design Verification Engineer (AI/Semiconductors): Driving full-chip signoff and ensuring manufacturable, high-quality silicon across advanced technology nodes with an accent on physical verification closure and debugging. Focus on leading DRC, LVS, and ERC closure, optimizing PV flows, and collaborating across RTL, PD, and CAD teams to achieve successful tapeouts.

Location: Hybrid (Santa Clara, CA; Austin, TX; or Fort Collins, CO)

Salary: $100k - $500k (base and variable compensation targets)

Company

hirify.global is leading the industry on cutting-edge AI technology, revolutionizing performance expectations and cost efficiency for AI platforms using high-performance RISC-V CPUs.

What you will do

• Drive full-chip signoff to ensure high-quality silicon across advanced technology nodes.
• Lead physical verification closure including DRC, LVS, and ERC.
• Debug complex verification issues using industry-standard PV tools.
• Collaborate with RTL, PD, CAD, and packaging teams to ensure successful tapeouts.
• Mentor and lead technical efforts in building efficient, manufacturable silicon.

Requirements

• BS or MS in Electrical, Electronics, or a related Engineering field.
• 7–14 years of hands-on experience in CPU/IP/SoC physical verification.
• Strong command of Calibre, ICV, Pegasus, FC, and Innovus.
• Expertise in DRC, LVS, ERC, PERC, Antenna, and DFM verification.
• Proficiency in Python and TCL for automation and flow optimization.
• Must be eligible to access U.S. export-controlled technology (subject to EAR compliance).

Nice to have

• Understanding of advanced node challenges (7nm, 5nm, 3nm) and FinFET design.
• Familiarity with ESD planning, padring integration, and reliability analysis (IR drop, EM).

Culture & Benefits

• Highly competitive compensation package and benefits.
• Collaborative environment that values curiosity and solving hard problems.
• Opportunity to work with a diverse team of technologists on a ground-up RISC-V CPU.
• Flexible hybrid work model in major US tech hubs.