Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration Team - Annapurna Labs (AI)

Location: Cupertino, California, USA

Salary: $183,000–$247,600 USD annually, plus sign-on payments and restricted stock units.

Company

hirify.global Web Services develops cloud platforms, custom silicon, machine-learning accelerators, and supporting software stacks.

What you will do

• Implement and deliver high-performance, power- and area-efficient SystemVerilog RTL for AWS machine-learning accelerator SoCs.
• Integrate subsystems into top-level SoCs, including clock, reset, functional, and DFT signal routing.
• Develop microarchitectures and analyze performance, power, area, and feature trade-offs.
• Deliver synthesis- and timing-clean designs with constraints and perform lint and clock-domain-crossing checks.
• Debug RTL test failures and collaborate with architects, verification, validation, synthesis, timing, and back-end engineering teams.

Requirements

• Bachelor’s degree in Electrical Engineering or a related field.
• 5+ years of RTL design for SoCs and 5+ years of VLSI engineering experience.
• 5+ years of experience with code-quality tools such as SpyGlass, lint, or CDC tools.
• Experience with SystemVerilog RTL, microarchitecture, assertions, SDC constraints, and RTL debug.
• Python scripting experience and strong analytical, problem-solving, and communication skills.

Nice to have

• Master’s degree in electrical engineering, computer engineering, or an equivalent field.
• Full-chip and subsystem integration experience in semiconductor design.
• Experience with datapath design, interconnects, and the AXI protocol.

Culture & Benefits

• Knowledge-sharing, mentorship, and thorough code reviews support engineering growth.
• Flexible working culture focused on work-life harmony.
• Employee-led affinity groups, inclusion events, and learning opportunities.
• Health, dental, vision, prescription, life, and mental-health benefits.
• 401(k) matching, paid time off, parental leave, and adoption and surrogacy reimbursement.