Sr. Staff Validation Engineer (ASIC)

TL;DR

Sr. Staff Validation Engineer (ASIC): Executing silicon bring-up and validation for high-speed interfaces with an accent on PCIe, CXL, DDR, and HBM memory subsystems. Focus on lab automation, characterization of link behavior, and solving complex debugging challenges across silicon, firmware, and hardware.

Location: Must be based in Santa Clara, CA

Salary: $127,630–$191,200 per annum

Company

hirify.global is a leader in semiconductor solutions, providing essential building blocks for data infrastructure across cloud, AI, and enterprise architectures.

What you will do

• Execute silicon bring-up and validation test plans for ASIC/SoC products.
• Maintain lab test environments including boards, power supplies, and cabling.
• Operate complex lab equipment like oscilloscopes, logic analyzers, and protocol analyzers.
• Develop automation scripts using Python or TCL for data collection and analysis.
• Characterize link and memory behavior including throughput, latency, and margins.
• Collaborate across teams to debug issues related to silicon, firmware, and hardware.

Requirements

• Bachelor’s degree in Electrical or Computer Engineering.
• 4+ years of experience in silicon or system validation.
• Eligibility to access export-controlled information under U.S. law.
• Hands-on knowledge of PCIe, CXL, DDR, or HBM.
• Proficiency in at least one scripting language such as Python or TCL.
• Experience with laboratory instruments like oscilloscopes and protocol analyzers.

Culture & Benefits

• Comprehensive financial well-being programs including employee stock purchase plans.
• Robust health and physical wellness resources.
• Support for family-life balance and personal development.
• Commitment to an inclusive workplace with equal opportunity for all applicants.