Yield Improvement Engineer (ASIC)

TL;DR

Yield Improvement Engineer (ASIC): Improving manufacturing yield for leading-edge ASICs with an accent on Design For Test and advanced technology nodes. Focus on developing and implementing solutions using C++ and Python, while integrating AI/ML algorithms into EDA flows.

Location: Must be based in Fort Collins, Colorado, USA

Salary: $147,400 - $235,800

Company

A global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Lead yield improvement efforts for sophisticated System-On-Chip designs.
• Design and implement testing solutions using C++ and Python.
• Integrate AI/ML algorithms to optimize yield management.
• Collaborate with engineering teams to improve EDA tool flows.
• Analyze complex yield data to drive product reliability and performance.

Requirements

• Master's degree or higher in EE/CS from a premier institution.
• 15+ years of experience in Yield Improvement for System-On-Chip designs.
• Demonstrable proficiency in C++ and/or Python implementation.
• Solid understanding of Design For Test in advanced technology nodes.
• Strong interpersonal and communication skills.

Nice to have

• Implementation experience with AI/ML algorithms.
• Practical experience with EDA tools and workflows.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(k) retirement plan with company matching.
• Employee Stock Purchase Program (ESPP).
• Competitive paid vacation, sick leave, and company holidays.
• Access to an Employee Assistance Program (EAP).