R&D Engineer (IC Design)
ΠΡΡΡ & Π‘ΠΎΠΏΡΠΎΠ²ΠΎΠ΄
ΠΠ»Ρ ΠΌΡΡΡΠ° Ρ ΡΡΠΎΠΉ Π²Π°ΠΊΠ°Π½ΡΠΈΠ΅ΠΉ Π½ΡΠΆΠ΅Π½ Plus
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
TL;DR
R&D Engineer (IC Design): Responsible for verification of complex switch designs, creating SystemVerilog-based verification environments and executing testplans for RTL and gatesim-based designs. Focus on creating ATE testing vectors and C-based diagnostic tests for actual silicon.
Location: Onsite in San Jose, USA
Salary: $108,000β$172,800 annually
Company
is a global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.
What you will do
- Create SystemVerilog-based verification environments including testbenches, checkers, and transactors.
- Create and execute testplans for verification of RTL and gatesim-based designs at both block and chip levels.
- Develop ATE testing vectors for semiconductor testing.
- Create C-based diagnostic tests to be run on actual silicon.
Requirements
- Master's Degree in Electrical and Electronic Engineering, Computer Science, or equivalent is required.
- Minimum of 6 years of work experience in Design Verification is required.
- Strong knowledge and hands-on experience in verification methods, tools, and environment.
- Strong programming skills, including System Verilog and scripting languages.
- English: B2 required.
Nice to have
- Knowledge and experience in UVM methodology.
- Knowledge of networking and switching concepts.
Culture & Benefits
- Competitive and comprehensive benefits package.
- Medical, dental, and vision plans.
- 401(K) participation including company matching.
- Employee Stock Purchase Program (ESPP).
- Company paid holidays, paid sick leave, and vacation time.
ΠΡΠ΄ΡΡΠ΅ ΠΎΡΡΠΎΡΠΎΠΆΠ½Ρ: Π΅ΡΠ»ΠΈ ΡΠ°Π±ΠΎΡΠΎΠ΄Π°ΡΠ΅Π»Ρ ΠΏΡΠΎΡΠΈΡ Π²ΠΎΠΉΡΠΈ Π² ΠΈΡ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡ iCloud/Google, ΠΏΡΠΈΡΠ»Π°ΡΡ ΠΊΠΎΠ΄/ΠΏΠ°ΡΠΎΠ»Ρ, Π·Π°ΠΏΡΡΡΠΈΡΡ ΠΊΠΎΠ΄/ΠΠ, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡΠ΅ ΡΡΠΎΠ³ΠΎ - ΡΡΠΎ ΠΌΠΎΡΠ΅Π½Π½ΠΈΠΊΠΈ. ΠΠ±ΡΠ·Π°ΡΠ΅Π»ΡΠ½ΠΎ ΠΆΠΌΠΈΡΠ΅ "ΠΠΎΠΆΠ°Π»ΠΎΠ²Π°ΡΡΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡΠΈΡΠ΅ Π² ΠΏΠΎΠ΄Π΄Π΅ΡΠΆΠΊΡ. ΠΠΎΠ΄ΡΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β