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1 час назад

Design Engineer (AI SoC Development)

164 470 - 232 190$
Формат работы
hybrid
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Design Engineer (AI SoC): Developing logic design, RTL coding, and simulation for AI SoC products with an accent on integrating IP blocks and optimizing for power, performance, and area. Focus on implementing Verilog/System Verilog designs and ensuring timing and power convergence for high-performance AI hardware.

Location: Hybrid (US: California, Oregon, Texas)

Salary: $164,470 - $232,190 USD

Company

hirify.global is a global leader in semiconductor innovation, developing processors and AI SoC products that power everything from edge devices to data centers.

What you will do

  • Develop logic design and RTL coding for SoC designs using Verilog/System Verilog.
  • Integrate IP blocks and subsystems into full chip SoC or discrete component designs.
  • Define architecture and microarchitecture features while optimizing for power, performance, area, and timing.
  • Collaborate with verification teams to review plans and resolve RTL test failures.
  • Assist physical design teams with synthesis, timing closure, and formal equivalence checks.
  • Support silicon bring-up and post-silicon validation, including debug and performance analysis.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 4+ years of experience in RTL design and implementation for ASIC/SoC development.
  • Proficiency in Verilog/System Verilog for RTL coding.
  • Experience with synthesis tools and timing closure methodologies.
  • Must be based in the US to support the hybrid work model at assigned hirify.global sites.

Nice to have

  • Understanding of clock domain crossings and power optimization.
  • Familiarity with standard bus protocols (AXI, AHB) and embedded processor architectures.
  • Experience with STA tools, formal verification, and EDA tools (VCS, Questa, IES, Spyglass).
  • Basic scripting skills in Python or TCL for automation.

Culture & Benefits

  • Competitive total compensation package including stock bonuses.
  • Comprehensive health, retirement, and vacation programs.
  • Hybrid work model allowing a split between on-site and off-site work.
  • Opportunity to work in a fast-paced environment with abundant learning and professional growth.

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