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4 дня назад

Principal Analog Design Engineer

165 630 - 248 100$
Формат работы
onsite
Тип работы
fulltime
Грейд
principal
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Principal Analog Design Engineer: Designing highly sophisticated CMOS transceiver/SERDES products with an accent on architectural investigations and implementation for circuits like PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs. Focus on building best-in-class serial links, working at the bleeding edge of technology and data rates, and hands-on design of key analog circuits.

Location: Santa Clara, CA. Requires eligibility to access export-controlled information as defined under U.S. export control laws and regulations. Except for U.S. citizens, lawful permanent residents, or protected individuals, all applicants may be subject to an export license review process prior to employment.

Salary: $165,630–$248,100 per annum

Company

hirify.global provides semiconductor solutions that are essential building blocks of the data infrastructure, enabling new possibilities across enterprise, cloud, AI, and carrier architectures.

What you will do

  • Lead architectural investigations and implementation for highly sophisticated CMOS transceiver/SERDES circuits (PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs).
  • Perform design verification using industry standard tools like SPICE, Spectre, and MATLAB.
  • Collaborate with system architects and global teams on circuit and physical design for best-in-class serial links.
  • Engage in R&D for cutting-edge technology and high data rate circuits.
  • Contribute to hands-on design of key analog circuits.

Requirements

  • Completed a MS or PhD in Electrical Engineering with 5-10 years of related experience.
  • Expertise in one or more of ADC/DACs, Front-Ends, CTLE, PLL, Timing circuits, CDRs, or SerDes.
  • Ability to collaborate with layout/physical design, system architecture, digital design, and validation teams.
  • Strong knowledge of deep sub-micron CMOS technologies and keen eye for analog layout.
  • Excellent problem-solving, analytical, and debug skills for circuit design and IP/product validation.
  • Must be eligible to access export-controlled information as defined under U.S. export control laws and regulations.
  • Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

Culture & Benefits

  • Comprehensive benefits supporting financial well-being, family support, mental and physical health, and recognition.
  • Employee stock purchase plan with a 2-year look back.
  • Family support programs and robust mental health resources.
  • Recognition and service awards.
  • Commitment to diversity and inclusion.

Hiring process

  • Candidates are not permitted to use AI tools (e.g., ChatGPT, Copilot) during interviews to record, assist with, or enhance responses.
  • Use of AI tools without prior instruction will result in disqualification from the hiring process.

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