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обновлено 10 дней назад

Analog Layout Engineer (Semiconductor)

120 000 - 192 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US

Описание вакансии

Текст:
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TL;DR

Analog Layout Engineer (Semiconductor): Designing and optimizing analog and RF layouts for advanced semiconductor nodes with an accent on FinFet technology, floorplanning, and top-level integration. Focus on debugging complex design rule checks, ensuring ESD and latch-up compliance, and collaborating with global design teams.

Location: Onsite in San Jose, CA, USA

Salary: $120,000–$192,000 annually

Company

hirify.global is a global technology leader designing, developing, and supplying a broad range of semiconductor and infrastructure software solutions.

What you will do

  • Work independently on block-level and IP-level analog layout design.
  • Coordinate with circuit designers and the layout team.
  • Perform floorplanning and layout for analog modules like SerDes, ADC/DAC, and PLL.
  • Execute top-level integration.
  • Ensure designs adhere to analog layout concepts for deep sub-micron processes.
  • Debug ESD, latch-up, EM, DRC, LVS, and antenna errors.

Requirements

  • Minimum 8+ years of hands-on experience in Analog or RF layout.
  • Good understanding of analog layout concepts for deep sub-micron processes.
  • Knowledge of fabrication process, with preference for FinFet experience.
  • Strong skills in debugging DRC, LVS, and antenna errors.
  • Experience with Cadence tools and TSMC processes are preferred.
  • Bachelor's degree required.

Culture & Benefits

  • Competitive and comprehensive benefits package including Medical, dental, and vision plans.
  • 401(K) participation with company matching.
  • Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
  • Company paid holidays, paid sick leave, and vacation time.
  • Support for Paid Family Leave and other leaves of absence.