RTL Design Engineer (Networking/NoC)

Location: San Francisco, United States; hybrid workplace.

Salary: $287K–$485K plus equity.

Company

OpenAI is an AI research and deployment company developing general-purpose AI systems and AI-native silicon for advanced workloads.

What you will do

• Design and implement high-performance RTL for next-generation AI accelerator silicon from microarchitecture through implementation and integration.
• Translate system-level requirements into efficient hardware microarchitectures with architecture and software teams.
• Drive hardware/software co-design to optimize performance, power, area, bandwidth, latency, throughput, and scalability.
• Develop datapaths, control logic, interconnects, NoC components, and other critical silicon subsystems.
• Partner with design and formal verification teams on functional correctness, verification strategies, and complex debugging.
• Work with physical design teams on synthesis, timing closure, power, area, block-level integration, and SoC-level performance optimization.

Requirements

• Strong hands-on experience with ASIC RTL design and microarchitecture development using SystemVerilog or Verilog.
• Experience designing complex digital hardware blocks from architecture and specification through RTL development and verification.
• Understanding of hardware architecture and microarchitecture tradeoffs involving performance, power, area, latency, and throughput.
• Experience collaborating with architecture, software, verification, and physical design teams.
• Ability to analyze complex hardware systems, identify performance bottlenecks, and translate architectural requirements into efficient RTL.
• Experience with synthesis, timing closure, and physical implementation considerations.
• Experience with Network-on-Chip, networking, interconnect fabrics, packet-based architectures, or high-bandwidth data movement systems.
• Ability to work on ambiguous, technically challenging problems and own designs from concept through integration.
• Candidates may need to meet legal status requirements under U.S. export control laws and regulations.

Nice to have

• Experience with AI accelerators, high-performance computing, or hardware/software co-design.

Culture & Benefits

• Hands-on work on AI-native silicon and tightly integrated systems for OpenAI’s supercomputing platform.
• Cross-functional collaboration with silicon architects, hardware and software engineers, verification, and physical design teams.
• Opportunity to influence architectural decisions and future silicon designs.
• Equal opportunity employment, reasonable accommodations, and legally compliant background checks.