Senior ASIC Design Engineer (AI/HPC)

Location: Remote for employees residing within the United States; San Jose, California

Company

hirify.global develops high-performance scale-out networking solutions for AI and HPC datacenters, integrating ASIC hardware, software, and system-level technologies for GPU, CPU, and accelerator clusters.

What you will do

• Implement Verilog/SystemVerilog RTL for high-speed data paths and packet-processing logic.
• Collaborate with verification engineers on block- and system-level test plans and design coverage.
• Define timing constraints and work with Physical Design engineers on timing closure.
• Support post-silicon validation and debug ASIC issues with hardware, firmware, and software teams.
• Optimize performance and develop power-aware strategies for Host Fabric Interface subsystems.

Requirements

• B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field.
• 8+ years of post-college digital design experience, including proficiency in Verilog and SystemVerilog.
• Experience designing ASIC RTL for high-speed data paths or packet processing.
• Deep understanding of Host Ethernet Adaptor architectures.
• Familiarity with timing closure and modern physical design methodologies.
• Proven system-level debugging and technical root cause analysis skills.
• Strong verbal and written communication skills.

Nice to have

• Knowledge of Ethernet architecture and networking protocols, including 50G, 100G, and 400G Ethernet, TCP/IP, RDMA/RoCE, and IPSec.
• Prior RTL development experience for Ethernet host adapters and system debug.
• Expertise in multiple clock-domain designs and asynchronous interfaces.
• 5+ years of scripting experience with TCL, Python, or Perl.
• Familiarity with EDA tools such as Design Compiler, Spyglass, or PrimeTime.

Culture & Benefits

• Flexible remote work environment within the United States.
• Competitive compensation package including base pay, equity, cash, and performance-based incentives.
• Medical, dental, vision, disability, life, dependent-care, accidental-injury, and pet insurance.
• Paid holidays, sick time, bonding leave, pregnancy disability leave, and Open Time Off for eligible regular full-time exempt employees.
• 401(k) with company match and collaboration with leading semiconductor-industry organizations.