IC Packaging Layout Manager (Semiconductor)

Location: Santa Clara, CA, United States of America

Expected base pay: $149,340–$223,700 per annum

Company

hirify.global develops semiconductor solutions for enterprise, cloud and AI, and carrier data infrastructure.

What you will do

• Manage the team responsible for IC packaging layout for high-speed 2D and 2.5D packages across multiple product lines.
• Develop IC package layouts while accounting for manufacturing and assembly tolerances.
• Manage layout resources across product lines and support new product introduction from concept through development and production ramp-up.
• Lead and develop a high-performance technical team, supporting team well-being and efficient execution.
• Coordinate with external IC package layout vendors and communicate requirements through presentations and documentation.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 8+ years of related professional experience; alternatively, a Master’s degree and/or PhD with 8–10 years of experience.
• Experience managing high-performance technical teams and resources for IC package layouts across multiple product lines.
• Strong expertise with IC package layout tools such as Cadence APD or Mentor XPD.
• Experience with 2.5D package design, including CoWoS, and IC package layout for high-speed SerDes interfaces such as 224 Gbps.
• Experience with die-to-die and HBM interfaces in 2D and 2.5D RDL interposers.
• Proven new product introduction experience from concept through development and production.
• Understanding of high-speed IC package design requirements, including constraint manager setup, power plane design, and translating power supply requirements into design.
• Ability to automate layout tasks using scripting and AI methodologies.
• Strong understanding of Design for Manufacturing, packaging technologies, materials, package substrate design rules, and assembly rules.
• Strong communication, presentation, and documentation skills.

Culture & Benefits

• New product introduction work involving semiconductor package development from concept to mass production.
• Bonus and equity plan eligibility, including a new-hire equity grant and annual equity refreshers.
• Employee stock purchase plan with a two-year look back.
• Family support programs, mental health resources, and recognition and service awards.
• Applicants requiring reasonable accommodation may contact hirify.global HR Helpdesk.
• Interview use of AI tools, including transcription, real-time answer generation, and automated note-taking, is prohibited and may result in disqualification.
• Access to export-controlled technology may require eligibility under U.S. export control laws and, for some applicants, an export license review before employment.