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5 дней назад

Advanced Package Technology Engineer (2.5D/3D Advanced Packaging)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Advanced Package Technology Engineer (2.5D/3D Advanced Packaging): Developing cost-effective, high-performance custom packaging solutions for ASIC products with an accent on signal integrity, thermal performance, structural reliability, and heterogeneous integration. Focus on leading 2.5D/3D package development, qualifying substrates and interposers, coordinating external assembly and memory partners, and supporting NPI and high-volume manufacturing.

Location: United States — San Jose, California, or Fort Collins, Colorado

Company

hirify.global develops ASIC products and advanced semiconductor packaging solutions.

What you will do

  • Lead the development of cost-effective, high-performance custom packaging solutions meeting signal integrity, thermal, structural reliability, design rule, and schedule requirements.
  • Act as the subject matter expert for 2.5D and 3D advanced packaging, defining customer needs and consolidating requirements into unified solutions.
  • Lead identification, development, and qualification of packaging solutions with external assembly and memory partners.
  • Collaborate with Design Integration, Package Design, Test Development, silicon, marketing, NPI, suppliers, and customers.
  • Support design wins, New Product Introduction, high-volume manufacturing ramps, alternate sourcing, and qualification initiatives.

Requirements

  • Ph.D. or Master’s degree in Mechanical, Electrical, or Electronics Engineering, with 10+ years of relevant experience.
  • 6+ years of hands-on experience in 2.5D/3D package development and heterogeneous integration.
  • Proven experience developing cost-effective, high-performance single- and multi-chip solutions optimized for speed, density, pin count, thermal performance, and reliability.
  • Experience with large, complex, custom, fine-pitch flip-chip packages using advanced multi-layer ceramic or organic substrates, interposers, and wafer-level packaging.
  • In-depth knowledge of silicon fabrication, bumping, interposer, substrate, and assembly processes; materials selection; supplier evaluation; BOM definition; and thermal-mechanical interactions.
  • Knowledge of silicon, package, and substrate technologies, design rules, failure analysis, materials, equipment, industry standards, and quality systems.
  • Hands-on experience with thermal and mechanical modeling tools and substrate/PCB design CAD tools such as APD, AutoCAD, or SolidWorks.
  • Understanding of advanced-node silicon fabrication, PCB technologies, and board assembly processes.
  • Strong analytical, problem-solving, project management, interpersonal, communication, and program-management skills, with the ability to manage multiple programs concurrently.

Nice to have

  • None specified.

Culture & Benefits

  • Cross-functional collaboration with global internal and external teams, suppliers, partners, and customers.
  • Periodic travel may be required.
  • Discretionary annual bonus, competitive new-hire equity grant, and annual equity awards are available subject to plan documents and award agreements.
  • Benefits include medical, dental and vision plans, 401(k) participation with company matching, ESPP, EAP, paid holidays, paid sick leave, vacation, and applicable family and other leaves.
  • Full-time employment in the United States.

Hiring process

  • First-time applicants must create a candidate login account before applying; existing candidates must sign in before applying.
  • Applicants located outside the USA should provide a home address for future correspondence.

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