aiphysical designsocpower integritytclelectromigrationplace and routeemirfinfet
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
Зарплата и рынок
По международному рынку данных пока нет
На СНГ рынке: $2.5к/мес ($1.9к - $3.1к)
88
Крутая вакансия
развернуть
Здесь можно отвечать за важное направление анализа целостности питания современных SoC в продуктовой компании, создающей чипы для AI-инфраструктуры; новый R&D-центр в Израиле дает влияние на развитие площадки, но добавляет некоторую неопределенность.
Кликните для подробной информации
Площадка с нуляАктуальная экспертизаЧипы для AIЧеткая специализация
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Staff Physical Design Engineer - SoC EMIR Engineer (AI Semiconductors): Developing and signing off EMIR and power-integrity methodologies for complex SoCs in advanced FinFET nodes with an accent on voltage-drop analysis, electromigration, and chip-package co-analysis. Focus on diagnosing power violations, balancing signal and power-grid EM, and ensuring reliability and yield for high-performance AI connectivity silicon.
Location: Haifa District, Israel; other location: Israel
Company
hirify.global develops rack-scale AI infrastructure and semiconductor connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, and UALink with its COSMOS software suite.
What you will do
Perform IR-drop analysis and signal- and power-electromigration analysis for complex SoCs.
Collaborate with Physical Design engineers to ensure full power integrity.
Partner with Package Design engineers on chip-package co-analysis.
Identify root causes of voltage-drop violations and electromigration risks.
Execute backend power methodologies for high-performance connectivity silicon and support voltage-drop and reliability targets.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering or a related technical field.
7+ years of hands-on EMIR or power-integrity analysis experience for high-performance SoCs or high-speed connectivity products.
Strong proficiency with industry-standard EMIR tools, including Ansys RedHawk/RedHawk-SC or Cadence Voltus.
Deep understanding of EM/IR challenges in advanced 7nm, 5nm, or 3nm FinFET process nodes.
Deep understanding of Place & Route flows, power-grid synthesis, RC extraction, and standard-cell architecture.
Deep understanding of electromigration and the trade-offs between signal EM and power-grid EM.
Nice to have
Familiarity with thermal-analysis tools and their interaction with electrical performance.
Experience with sign-off criteria and margins for high-volume production chips.
Good understanding of timing and P&R.
Basic understanding of packaging, top-metal layers, MIM capacitor usage, and power distribution.
Ability to write TCL scripts for STA and Fusion Compiler.
Culture & Benefits
Join a new strategic R&D center in Israel and take meaningful technical ownership at a site being built from the ground up.
Work on chips supporting large-scale AI and cloud environments.
The company encourages applications from people with diverse backgrounds and experiences, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →