Principal SoC RTL Engineer (Verilog)

Location: Austin, Texas, United States

Company

hirify.global develops ultra-low-power semiconductor solutions for wearables, medical devices, IoT products, and AI-powered edge applications.

What you will do

• Own pre-tapeout quality for digital SoC modules on MCU platforms.
• Explore architecture, develop microarchitecture, and create RTL for complex IPs and SoCs using Verilog/SystemVerilog.
• Identify, select, and integrate third-party IP.
• Collaborate with verification and FPGA teams on test planning and debug.
• Work with Physical Design to close designs against timing and power targets.
• Run LINT, CDC, and RDC quality checks, resolve or waive issues, and assist with silicon bring-up and validation.

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 20 years of experience.
• Deep and broad knowledge of current and emerging SoC design technologies.
• Expertise in designing, implementing, and troubleshooting IPs and SoCs.
• Deep understanding of customer needs and the competitive landscape.
• Ability to estimate impact, plan and lead implementations, and improve overall output.
• Ability to architect and guide programs across the full range of technical areas.

Culture & Benefits

• Cross-functional work across design, research, development, production, marketing, sales, and operations.
• Work in a culture centered on innovation, collaboration, focus, continuous learning, customer-centric thinking, and execution.
• Hands-on principal individual-contributor role with direct impact on production silicon and energy efficiency.