Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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$144к-230к/год
$140к$160кмедиана$190к
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Крутая вакансия
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Чётко описанная senior-роль в крупной полупроводниковой компании связана с PCIe и оборудованием для дата-центров, но требование 12+ лет опыта и обязательная работа в офисе ограничивают доступность вакансии.
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Высокий порог опытаСовременные чипыПонятные задачиТолько офис
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Digital IC Design Engineer (Verilog/SystemVerilog): Developing high-performance RTL designs for PCIe switch and enterprise storage products supporting next-generation AI/ML data center ecosystems with an accent on micro-architecture, low-power design, clock-domain crossings, and pipelining. Focus on optimizing RTL for timing closure, debugging complex designs, integrating third-party IP, and supporting silicon validation.
Location: Colorado Springs, Colorado, United States. Must work in person; no remote work allowed.
Annual base salary: USD 143,800–230,000.
Company
hirify.global develops semiconductor and infrastructure technology, including PCIe switch and enterprise storage products for data center and AI/ML ecosystems.
What you will do
Analyze and author high-level architecture specifications and participate in interactive design reviews.
Develop and document micro-architectures for digital IC designs.
Implement high-quality, high-performance Verilog/SystemVerilog RTL from design specifications, including clock-domain crossings, multiple power domains, low-power design, complex algorithms, deep computations, pipelining, multithreaded designs, and third-party IP integration.
Optimize RTL designs to achieve timing closure and develop robust solutions for RTL debugging.
Collaborate with Verification, Software/Firmware, Emulation, and Validation Engineering teams to resolve RTL design issues.
Provide lab support during silicon validation.
Requirements
Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or an equivalent engineering discipline.
12+ years of relevant industry experience.
In-depth knowledge of implementing and supporting RTL designs using Verilog/SystemVerilog.
Nice to have
Experience with PCIe, CXL, or AMBA protocols.
Experience with RAID storage designs or PCIe switch designs.
Culture & Benefits
Discretionary annual bonus and competitive new-hire and annual equity awards, subject to applicable plans and agreements.
Medical, dental, and vision plans.
401(k) participation with company matching and an Employee Stock Purchase Program.
Employee Assistance Program, company-paid holidays, paid sick leave, vacation time, and applicable paid family and other leave.
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