FPGA Prototyping Engineer (Emulation)

Location: On-site in Penang, Malaysia

Company

hirify.global develops semiconductor products and technology solutions, with this role supporting emulation and FPGA modeling across its product portfolio.

What you will do

• Build and optimize emulation and FPGA models from RTL designs using synthesis, partitioning, and routing tools.
• Develop, integrate, test, and debug hardware and software collateral for simulation, emulation, and FPGA models.
• Design directed tests, hybrid emulation environments, and test environments for hardware and software/firmware verification.
• Develop tools, capabilities, automation aids, flows, and scripts that improve emulation and FPGA usability.
• Debug RTL validation failures and troubleshoot emulation platforms, interfaces, and test environments.
• Collaborate with design, power and performance, silicon validation, and software teams on SoC and IP bring-up and testbench debugging.

Requirements

• Bachelor's degree in Electrical and Electronics Engineering, Computer Engineering, or a related field with 0–1 years of hands-on emulation and FPGA development experience demonstrated through internships, academic projects, coursework, or hands-on training; or a Master's degree in a related field with no prior professional experience.
• Proficiency in Python or Perl scripting.
• Experience debugging RTL code using industry-standard hardware simulation, emulation, or FPGA tools.

Nice to have

• Familiarity with SystemVerilog and verification methodologies.
• Experience with IP or SoC validation processes.
• Strong communication and collaboration skills, including the ability to work effectively in diverse teams.

Culture & Benefits

• Full-time, on-site role with Shift 1 working hours in Malaysia.
• Collaborative work with cross-functional design, validation, verification, and software teams.
• Employment is subject to hirify.global's ethical hiring practices; candidates are not charged recruitment, medical examination, or other hiring-related fees.