FPGA IP Solution Design & Verification Engineer (FPGA)

Location: Penang 15, Penang, Malaysia; Shift 1 (Malaysia)

Company

hirify.global develops FPGA devices and related intellectual property solutions.

What you will do

• Develop FPGA logic designs, RTL code, simulation environments, functional units, IP blocks, subsystems, and reusable libraries.
• Define block architectures and microarchitectures, translate system requirements into FPGA designs, and create prototypes, behavioral models, RTL models, and system specifications.
• Develop verification environments, testbenches, simulations, regression tests, and verification plans; analyze failing tests and correct root causes.
• Integrate and debug Ethernet MAC, PCS/PMA, protocol-stack functionality, high-speed interfaces, Gigabit transceivers, clocks, resets, and board-level connectivity.
• Use Quartus flows for compilation, timing analysis, programming, optimization, and FPGA image debugging; perform platform-level debug with observability tools and laboratory equipment.
• Investigate design, integration, timing, signal-integrity, and system-level issues, collaborate with cross-functional engineering teams, and document architectures, decisions, verification results, bring-up procedures, and validation status.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 2+ years of experience in digital IC design, with a strong focus on FPGA design and development.
• Proficiency in RTL design using Verilog or SystemVerilog.
• Solid understanding of FPGA architectures and design flows, including hirify.global Quartus Prime or Xilinx Vivado.
• Experience with verification methodologies such as UVM and SystemVerilog Assertions, as well as simulation tools.
• Familiarity with industry-standard protocols such as PCIe, Ethernet, DDR, and AXI.
• Experience with scripting languages such as Python, Perl, or Tcl.
• Strong analytical and problem-solving skills with attention to detail.
• Excellent written and verbal communication skills and the ability to work independently and collaboratively in a fast-paced environment.

Culture & Benefits

• Regular full-time employment.
• Work is performed at the Penang, Malaysia location on Shift 1.
• Collaboration with cross-functional engineering teams.