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8 дней назад

Lead Design Verification Engineer (FPGA)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior/lead
Английский
b2
Страна
Malaysia
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Lead Design Verification Engineer (FPGA): Performing functional and pre-silicon verification of FPGA designs with an accent on verification planning, SystemVerilog-based test benches, simulation, coverage, and debug. Focus on developing verification environments, analyzing power and timing, closing coverage, and resolving complex architectural and microarchitectural issues in collaboration with RTL, architecture, physical design, systems, and software teams.

Location: Penang 15, Penang, Malaysia; Shift 1 (Malaysia)

Company

hirify.global develops FPGA and related semiconductor technologies.

What you will do

  • Perform functional logic verification of FPGA designs against specification and microarchitecture requirements.
  • Develop verification plans, test benches, verification environments, and system simulation models to achieve feature coverage.
  • Execute verification plans, analyze power and timing, identify bugs, and debug issues in the pre-silicon environment.
  • Replicate failures, determine root causes, and implement corrective measures.
  • Collaborate with FPGA architects, RTL developers, physical design teams, systems engineers, and software engineers on complex feature verification and integration testing.
  • Document, review, and improve verification strategies, plans, methodologies, and functional verification infrastructure.

Requirements

  • BS, MS, or PhD in Electrical Engineering, Computer Science Engineering, or a related field, with 10+ years of technical experience.
  • Technical experience in pre-silicon validation or verification.
  • Experience with OVM/UVM, SystemVerilog, and constrained-random verification methodologies.

Nice to have

  • Experience developing, maintaining, and executing verification for complex IPs and/or SoCs.
  • Experience across the complete verification lifecycle, including verification architecture, test planning, execution, debug, and coverage closure.
  • Experience developing validation test suites and continuously improving validation suites and methodologies.
  • Experience with PCIe or UCIe PHY verification.

Culture & Benefits

  • Regular full-time employment.
  • Collaboration with architecture, design, physical design, systems, and software engineering teams.

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