Senior Member of Technical Staff (Advanced Packaging Pathfinding)

Location: Singapore, Singapore; Science Park II, moving to Tampines in December 2026. Full-time onsite role with 20% travel; relocation eligible.

Company

hirify.global develops materials science and engineering solutions, equipment, and services for semiconductor chips and advanced displays.

What you will do

• Drive N+2 and beyond pathfinding for advanced packaging, including interconnect scaling, materials, and integration architectures.
• Lead hands-on feasibility studies and technology development for D2W, RDL, CoWoS, TSV, hybrid bonding, heterogeneous integration, advanced bumping, and next-generation substrates.
• Design experiments, simulations, test vehicles, prototypes, and demonstration vehicles to validate concepts and reduce technical risk.
• Develop scaling frameworks and design–process co-optimization strategies addressing performance, cost, and reliability.
• Translate customer requirements and system trends in AI, HPC, memory integration, and chiplets into technical solutions and value propositions.
• Collaborate with materials suppliers, equipment teams, OSATs, foundries, research partners, and cross-functional teams; mentor junior engineers and communicate roadmap recommendations.

Requirements

• 10–15+ years of experience in semiconductor technology, with strong exposure to advanced packaging, process integration, or related domains.
• Demonstrated experience in technology development, pathfinding, or exploratory R&D.
• Strong understanding of advanced packaging technologies, including RDL, TSV, CoWoS, and related integration approaches.
• Proven ability to solve complex technical problems and translate concepts into experimental validation.
• Strong communication skills for articulating technical insights and business relevance.

Nice to have

• Advanced degree such as an MS or PhD in Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or a related field.
• Experience in heterogeneous integration, chiplet architectures, or next-generation interconnect technologies.
• Innovation track record demonstrated through patents, publications, or first-of-a-kind solutions.
• Familiarity with design–process co-optimization and system-level trade-offs.

Culture & Benefits

• Supportive work culture focused on learning, development, and career growth.
• Opportunity to work with global R&D teams and ecosystem partners on semiconductor and display technologies.
• Employee health and wellbeing programs supporting personal and professional growth.
• Work at the intersection of technology innovation, customer roadmaps, and ecosystem collaboration.