Packaging Module Development Engineer (Semiconductor Packaging)
Контакты
133 800 - 188 890$
Формат работы
onsite
Тип работы
fulltime
Грейд
junior
Английский
b2
Страна
US
pythonsqlmechanical engineeringmatlabmaterials sciencestatistical process controldesign of experimentssemiconductor packagingthermal interfacewarpage mitigation
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Выше среднего
$134к-189к/год
$91к$110кмедиана$120к
По похожим ролям (50) ~ $110к/год
97
Крутая вакансия
развернуть
В Company hidden предлагают чётко описанную стартовую инженерную роль в передовой упаковке полупроводников с конкретными задачами и возможностью работать над технологиями массового производства.
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Оплата выше рынкаПонятные задачиПередовая отрасльРабота на площадке
Оценка от Hirify AI
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Packaging Module Development Engineer (Semiconductor Packaging): Developing advanced thermal interface and warpage mitigation solutions for semiconductor packaging platforms with an accent on materials innovation, assembly process optimization, and high-volume manufacturability. Focus on qualifying materials and equipment, resolving complex packaging assembly failures, and supporting quality, yield, reliability, and process scalability.
Location: On-site in Chandler, Arizona, United States; primary location listed as Phoenix, Arizona, United States.
Annual salary: $133,800–$188,890 USD.
Company
hirify.global develops and commercializes semiconductor packaging technologies for mobile, edge, and hyperscale computing platforms.
What you will do
Develop, qualify, and implement thermal interface and warpage mitigation solutions for future packaging platforms.
Optimize advanced assembly processes for quality, reliability, cost, yield, productivity, and high-volume scalability.
Research and qualify next-generation materials, specialized assembly equipment, and fabrication processes.
Manage engineering project milestones aligned with technology development and product timelines.
Apply statistical methods, structural judgment, and materials analysis to resolve complex packaging assembly failures.
Provide sustaining engineering support for equipment performance and process health in high-volume manufacturing lines and respond to foundry customer technical requests.
Requirements
Master’s degree or PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, Applied Physics, or a related STEM field.
At least 1 year of experience in materials characterization, packaging process development, or mechanical testing through academic research, coursework, internships, military training, or industry experience.
Minimum GPA of 3.5 on a 4.0 scale.
At least one publication as a primary or contributing author in a peer-reviewed technical journal.
Strong critical thinking, interpersonal, collaboration, adaptability, autonomy, and technical leadership skills, including the ability to coach, develop, and lead technical teams.
Nice to have
At least 1 year of experience in semiconductor packaging technology development, including hands-on use of Statistical Process Control (SPC) or Design of Experiments (DOE).
Experience executing complex, time-critical engineering projects in a semiconductor foundry or manufacturing environment.
Experience using Python, MATLAB, or SQL to analyze multidimensional engineering datasets.
Culture & Benefits
On-site work model at the Chandler, Arizona campus.
Collaboration with global teams and industry leaders within a matrixed organization.
Health, retirement, and vacation benefits.
Competitive pay and stock bonuses.
Shift 1 schedule in the United States.
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