Advanced Packaging Cryogenic Modeling Engineer (Semiconductor Packaging/Cryogenic Modeling): Developing and correlating thermal, mechanical, and electrical models for cryogenic semiconductor devices and advanced 3DHI packages with an accent on temperature-dependent material properties, thermo-mechanical effects, and process integration. Focus on simulating cryogenic process flows, identifying critical process interactions, and optimizing mechanical, thermal, and electrical performance.
Location: Essex Junction, United States; travel up to 10%
Salary: $118,000–$239,000 per year
Company
hirify.global is a full-service semiconductor foundry providing design, development, and fabrication services with a global manufacturing footprint.
What you will do
Develop, correlate, and apply cryogenic thermal, mechanical, and/or electrical models for semiconductor devices and advanced packages at 77 K and below.
Model temperature-dependent material properties, boundary conditions, thermal contraction, CTE mismatch, and other thermo-mechanical effects.
Perform stress simulations for continuous and discontinuous active areas and assess effects on device performance when applying mechanical modeling.
Anticipate integration and process issues using information from integration, process, and design enablement teams.
Facilitate discussions to identify simulations that expose critical process interactions and support 3DHI technology decisions.
Interact extensively with integration, device, and design engineers to develop working technology while supporting safety and EHS&S programs.
Requirements
M.S. degree and at least 10 years of relevant experience.
Experience with semiconductor mechanical, thermal, and/or electrical simulation tools, including Ansys Mechanical Workbench or applicable software.
Experience developing and correlating cryogenic models with temperature-dependent material properties and boundary conditions.
Strong problem-solving and technical troubleshooting skills, including expertise in design of experiments.
Overall GPA of at least 3.0 and proven good academic standing.
Fluent written and verbal English.
Solid understanding of semiconductor processes and integration techniques.
Good computer and software skills, with the ability to clearly present results to small and large groups.
Nice to have
PhD with 8 years of relevant experience.
Thermal and electrical simulation for specific IC circuit designs, preferably RF analog, with LVS and DRC verification tools such as Cadence, Mentor Graphics, or Keysight ADS.
Experience performing in environments requiring strong attention to detail and timeliness.
Prior leadership experience in the workplace, school projects, or competitions.
Project management skills, including innovating and executing solutions and navigating ambiguity.
Strong written and verbal communication, planning, and organizational skills.
Culture & Benefits
Full-time employment at a semiconductor foundry.
Work includes collaboration across integration, device, design, process, and design enablement teams.
Activities must be performed safely and responsibly in support of Environmental, Health, Safety & Security requirements and programs.
Employment is subject to applicable pre-employment conditions and laws.
Equal opportunity employment with reasonable accommodation available during the hiring process.
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