Senior RTL Design Engineer (AI)

Location: Remote; Palo Alto, with remote and on-site locations in the U.S. and Canada

Target base salary: $160,000–$240,000 per year, plus equity, benefits, and 401(k)

Company

Builds foundational technology for performance, scalability, and resiliency challenges in large-scale AI data center clusters.

What you will do

• Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog.
• Translate architectural specifications into clean, efficient, scalable microarchitectures and production-ready RTL.
• Collaborate with architecture, verification, and physical design teams on design correctness, integration, and closure.
• Perform linting and CDC analysis, ensure synthesis readiness, and support simulation, RTL debug, and early silicon environments.
• Participate in design reviews, evaluate architecture and implementation tradeoffs, and contribute to reusable coding standards and documentation.
• Support timing closure, backend activities, functional coverage, and continuous improvement of design methodologies, flows, and tools.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in RTL design.
• Strong hands-on experience with Verilog/SystemVerilog.
• Solid understanding of synchronous digital design and microarchitecture principles.
• Experience with simulation and debug tools such as VCS, Questa, Verdi, or DVE.
• Familiarity with synthesis, timing, and physical design constraints.
• Strong analytical and problem-solving skills, clear written and verbal communication, and high attention to detail.
• Ability to work independently and manage tasks to completion, including AI-assisted workflows.

Nice to have

• Experience designing high-performance systems such as AI/ML accelerators, networking systems, or SoCs.
• Familiarity with low-power design techniques, including clock gating and power gating.
• Exposure to DFT concepts and design-for-test considerations.
• Experience with scripting in Python, Tcl, or similar languages.
• Experience with advanced semiconductor process nodes.
• Experience using AI coding agents such as Claude Code, Cursor, or Copilot in RTL implementation, debugging, and timing closure, with rigor in verifying generated output.
• Interest in turning design experience into reusable AI agent guidance, including RTL coding patterns, timing-closure playbooks, or review checklists.

Culture & Benefits

• Remote work within an organization operating across the U.S. and Canada, with a mix of remote and on-site locations.
• Collaborative environment based on trust, integrity, respect, shared responsibility, and accountability.
• Meaningful equity, benefits, and 401(k).
• Equal opportunity employment and support for professional growth.