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7 дней назад

Principal Application Engineer (STA)

116 200 - 215 800$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Principal Application Engineer (STA): Providing pre-sales and post-sales technical support for digital implementation and signoff tools with an accent on static timing analysis, implementation flows, benchmarks, and customer methodology consultations. Focus on presenting synthesis, place-and-route, timing, physical, and power signoff capabilities, debugging UPF and constraints, and supporting hierarchical and 3DIC timing closure solutions.

Location: Austin, United States of America; onsite customer support may include on- and offsite work; travel required up to 20%.

Annual salary: $116,200–$215,800 for California other than San Jose; incentive compensation, bonus, equity, and benefits may also apply.

Company

hirify.global develops digital implementation and signoff tools and methodologies for the technology industry.

What you will do

  • Provide pre-sales and post-sales technical support for digital implementation and signoff tools.
  • Support sales campaigns through customer workshops, benchmarks, product demonstrations, methodology consultations, and product support.
  • Present the technical capabilities of synthesis, place and route, timing, physical, and power signoff tools and flows.
  • Identify product opportunities and work with account teams to define and execute technical campaigns.
  • Support technical evaluations, benchmarks, hirify.global solution implementations, and ongoing usage proliferation at existing customers.
  • Collaborate with R&D on tool and methodology improvements and create technical content for hirify.global Online Support.

Requirements

  • BS in Electrical Engineering with 8–10 years of experience, or MS in Electrical Engineering with 6–8 years of experience.
  • Core timing signoff expertise, advanced-node static timing analysis, UPF and constraints debugging, and hierarchical and 3DIC design timing analysis and closure solutions.
  • Knowledge of digital design fundamentals, semiconductor fundamentals, and static timing analysis.
  • Experience with ASIC digital implementation flows and tools.
  • Working knowledge of a scripting language: TCL, Perl, or Python.
  • Strong customer-facing communication and problem-solving skills.
  • Strong personal drive for continuous learning and expanding professional skill sets.
  • Strong verbal and written communication skills.

Culture & Benefits

  • Opportunity to work on technology challenges and develop technical leadership.
  • Paid vacation and paid holidays.
  • 401(k) plan with employer match.
  • Employee stock purchase plan.
  • Medical, dental, and vision plan options.
  • Potential bonus, equity, and other incentive compensation.

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