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2 дня назад

Silicon Design Verification Engineer

160 000 - 600 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Silicon Design Verification Engineer (SystemVerilog/UVM): Verifying MatX compute subsystems for AI hardware across blocks, subsystems, full-chip, and system-level validation with an accent on structural and functional coverage, formal verification, and silicon milestones. Focus on building scalable testbenches and portable tests, qualifying subsystem software, and driving verification closure from architecture through tapeout and production silicon.

Location: Mountain View, United States, or remote; hybrid work arrangement. The position requires access to information subject to U.S. export controls and the ability to perform the role without obtaining an export-control license.

US base salary: $160,000–$275,000 for Early Career, $175,000–$400,000 for Mid Career, or $250,000–$600,000 for Senior Career, plus equity.

Company

hirify.global develops hardware and compute systems designed to run AI models efficiently, including a compute subsystem for high-performance machine-learning workloads.

What you will do

  • Contribute to a scalable compute-subsystem verification methodology spanning blocks, subsystems, full-chip validation, and system-level validation.
  • Own subsystem and block-level verification execution, including testbenches, tests, and related artifacts for structural and functional coverage closure.
  • Qualify software-stack components running on the subsystem.
  • Plan and drive intermediate and sign-off reviews covering verification plans, execution progress, and closure.
  • Drive verification toward design freeze, tapeout, and other silicon milestones.

Requirements

  • At least 5 years of silicon design-verification experience.
  • End-to-end concept-to-silicon tapeout experience, including driving verification from architecture or design specification through design freeze, tapeout, and production silicon.
  • Production experience with SystemVerilog and UVM, assertion-based verification, formal verification, and simulation-based verification.
  • Experience with Python, C/C++, and similar scripting or programming languages for verification and silicon modeling.
  • Production experience creating portable tests and drivers for silicon validation and post-silicon debugging.
  • Strong understanding of silicon microarchitecture and high-performance compute design concepts involving CPUs, GPUs, accelerators, memory management, and related functionality.

Nice to have

  • Knowledge of floating-point and fixed-point arithmetic, rounding, and precision.
  • Experience with accelerators, DMA engines, systolic operations, or systolic arrays.
  • Experience with Rust, functional programming, Haskell, or functionally rooted HDLs such as Bluespec.
  • Familiarity with emulation and prototyping platforms and methodologies.
  • Hands-on experience with silicon debugging and bring-up.

Culture & Benefits

  • Hybrid work with up to 3 weeks of remote work; 4 weeks of accrued PTO and 12 company holidays.
  • Company-subsidized medical, dental, vision, life, HSA, FSA, disability, and travel insurance options.
  • Roth or pre-tax 401(k) with a 5% company contribution, plus additional life-insurance coverage.
  • $1,500 annual professional-development budget and up to $1,000 for home-office setup.
  • Onsite team lunch and dinner Monday through Friday, commute support, and monthly cell, internet, and flexible-perk reimbursements.
  • Paid parental leave, pregnancy disability leave, flexible return-to-work hours, family-support funding, and paid mental-health benefits.

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