Head of Silicon Product Engineering

Location: Mountain View, United States; hybrid

Company

hirify.global is an applied AI company building foundational hardware and software for the semiconductor industry, AI infrastructure, and systems, including custom silicon for AI inference.

What you will do

• Own end-to-end post-silicon bring-up, characterization, validation, and debugging across multiple silicon generations.
• Define and drive packaging and test strategy, including ATE program development, test coverage, and test-condition optimization for yield, quality, and performance.
• Select, qualify, and manage OSAT and test-house partners through NPI and high-volume manufacturing, including cost, quality, and yield negotiations.
• Lead yield learning, qualification, root-cause analysis, production calibration, and screening for complex, high-reliability memory products.
• Build and lead the silicon product engineering organization, including hiring, processes, tooling, and data-analysis practices.
• Partner with design, architecture, and supply chain teams to ensure products are producible, testable, cost-effective, and optimized for yield.

Requirements

• 15+ years of semiconductor product or test engineering experience with direct ownership of silicon from NPI through high-volume manufacturing.
• Experience selecting and managing OSAT and foundry partners, including cost, quality, and yield negotiations.
• Deep hands-on experience with packaging, ATE, post-silicon bring-up, and validation.
• Experience developing production test and screening methodology for complex, high-reliability products.
• Track record of building and scaling engineering teams from an early stage.
• Strong cross-functional fluency with design, architecture, and supply chain organizations.
• Bachelor’s or Master’s degree in Electrical Engineering or a related field.

Nice to have

• Experience bringing up test and qualification for a new or unconventional silicon architecture, rather than only a new generation of a familiar architecture.
• Experience with memory-adjacent product engineering, including DRAM, HBM, or custom memory modules.
• Experience at an AI or high-performance computing startup with tight iteration cycles between design, verification, and product engineering.
• Comfort operating where test methodology is being invented alongside the hardware.

Culture & Benefits

• Hybrid work based in Mountain View.
• Collaboration across New York City, Silicon Valley, London, Copenhagen, and Seoul.
• Inclusive environment and commitment to equal employment opportunity.
• Reasonable accommodations are available for individuals with disabilities.