Post-Silicon Validation Engineer (AI)

Location: Palo Alto Office, USA

Company

hirify.global is developing world models and agents for learning, evaluating, planning, experimenting, and interacting with the physical world, with an initial focus on hardware, electronics systems, semiconductors, and AI-assisted design.

What you will do

• Plan and execute post-silicon bring-up and validation for SoCs and IP.
• Develop validation content, test plans, and automated test infrastructure.
• Debug silicon failures across logic, timing, power, and system interactions.
• Correlate silicon results with pre-silicon simulation, emulation, and formal results.
• Work with design, DFT, and product engineering teams to identify root causes and drive fixes.
• Capture silicon learnings for hirify.global’s models and verification flows.

Requirements

• 5+ years of post-silicon validation or bring-up experience.
• Hands-on lab experience with oscilloscopes, logic analyzers, JTAG, and debug tools.
• Strong Python and C/C++ skills for test automation.
• Experience with high-speed interfaces such as PCIe, DDR, Ethernet, or similar technologies.
• Systematic debugging skills across hardware and software.

Nice to have

• Experience with silicon characterization and yield.
• Background in pre-silicon verification.
• Interest in AI-assisted design tools.

Culture & Benefits

• Full-time role within the Chips & Silicon department.
• Work with leading semiconductor companies on real silicon programs.
• Collaborate with a team including former Stanford professors, SAIL researchers, semiconductor executives, and hardware verification experts.
• Backed by Silicon Valley investors, Stanford University, and technology industry leaders.