Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
Пожаловаться
Зарплата и рынок
Выше рынка
$175к-400к/год
$180к$220кмедиана$260к
По похожим ролям (50) ~ $220к/год
91
Крутая вакансия
развернуть
Company hidden предлагает чёткую роль в разработке AI-чипов с ответственностью от архитектуры до tapeout, зарплатой выше рыночной и сильным пакетом льгот; ограничения экспортного контроля США сужают круг тех, кто может занять эту позицию.
Кликните для подробной информации
Ограничения СШАОтветственность от начала до концаЗарплата выше рынкаАппаратная часть AIСильный пакет льгот
Оценка от Hirify AI
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Подключить Plus
Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Silicon Design Engineer (AI): Developing micro-architecture and RTL for compute subsystems that accelerate machine-learning workloads, with an accent on silicon design ownership, performance-power-area optimization, and sign-off readiness. Focus on designing ML datapaths, managing data movement through caches and buffers, closing timing and area targets, and delivering tapeout-ready designs in collaboration with verification, DFT, and physical-design teams.
Location: Mountain View, United States (HQ) or remote; hybrid work format. The position requires access to information subject to U.S. export controls and the ability to comply with U.S. export-control laws without obtaining a license.
US base salary: $175,000–$400,000 for Mid Career or $250,000–$600,000 for Senior Career, plus equity.
Company
hirify.global develops hardware and compute systems designed to run AI models efficiently and improve AI quality and availability.
What you will do
Own micro-architecture and RTL for compute-subsystem blocks from architecture through sign-off-ready design.
Contribute to a scalable silicon architecture-to-design methodology across blocks, subsystems, and full-chip design.
Own subsystems, subsets, or chip-level silicon design deliverables through design freeze and tapeout.
Plan and drive micro-architecture, design-specification, execution-progress, area-closure, and timing-closure reviews.
Collaborate with verification, DFT, and physical-design co-owners to deliver high-performance, power-efficient, area-efficient designs.
Test designs and work toward performance and coverage closure, including synthesis, lint, and sign-off flows.
Requirements
At least 5 years of silicon design experience.
Tape-out experience with end-to-end ownership of chip designs through multiple generations.
Production-proven experience with silicon micro-architecture and design for high-performance compute, including CPUs, GPUs, accelerators, high-speed connectivity, and memory management.
Ability and willingness to ramp up on Bluespec, the functionally rooted HDL used for the designs.
Experience with SystemVerilog, Python, C/C++, and similar scripting or programming languages for chip design and related flows.
Experience testing designs and collaborating with verification teams toward performance and coverage closure.
Hands-on experience with design synthesis, design lint, and related flows for high-quality sign-off.
Experience designing ML arithmetic and compute datapaths, including matmul or systolic MAC arrays, reduction trees, and floating-point or special-function units such as MuFu.
Experience with logic for moving, storing, or managing data, including caches, buffers, and crossbars.
Nice to have
Prior Bluespec experience.
Familiarity with functional-programming paradigms such as Haskell.
Familiarity with verification and emulation platforms and methodologies.
Culture & Benefits
Full-time employment with four weeks of accrued PTO, 12 company holidays, and up to three weeks of remote work.
Roth or pre-tax 401(k) with a 5% company contribution, plus paid life insurance.
$1,500 annual professional-development budget, onsite team meals Monday through Friday, and full daily commute support.
Monthly perks, cellular and internet reimbursements, and up to $1,000 for remote home-office setup.
Paid mental-health benefits, up to 12 weeks of paid parental leave, pregnancy disability leave, flexible return-to-work hours, and a $6,000 family fund.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →