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5 дней назад

Signal Integrity Engineer (PCIe/DDR5)

149 999 - 224 000$
Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Signal Integrity Engineer (PCIe/DDR5): Developing and validating high-performance storage platforms with an accent on high-speed channel design, electrical modeling, lab testing, and production-quality hardware standards. Focus on system-level debug, root-cause analysis, automated simulation flows, reporting pipelines, and CI-style checks for PCIe, Ethernet, and DDR interfaces.

Location: Santa Clara, California; primarily in-office work from the Santa Clara, CA office is expected.

Annual base salary: $149,999–$224,000 USD. The role may also be eligible for incentive pay and/or equity.

Company

hirify.global is a data platform company serving hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem.

What you will do

  • Support signal integrity across high-speed hardware products, including PCIe Gen5+, 800G Ethernet, and DDR5, from link budgets through production release.
  • Collaborate with PCB layout, hardware, and mechanical teams on stackups, materials, routing rules, and design constraints.
  • Lead or support electrical modeling, design reviews, lab testing, system-level debugging, root-cause analysis, and corrective actions across prototypes, validation, production, and field escalations.
  • Develop and standardize automated simulation flows, reporting pipelines, and CI-style checks for model and layout quality.
  • Collaborate with Hardware Design, PCB Layout, firmware, and manufacturing teams to improve reliability and performance margins.

Requirements

  • Foundational knowledge of high-speed channel design and validation for PCIe Gen4+, 25G+ SerDes Ethernet, and DDR4/DDR5.
  • Understanding of electromagnetic concepts, crosstalk mitigation, and jitter analysis.
  • Exposure to industry-standard EDA tools such as HyperLynx, Sigrity, Simbeor, or HFSS for pre- and post-layout SI analysis, including IBIS-AMI, COM, and channel modeling.
  • Hands-on laboratory experience with high-speed instruments such as VNA, TDR, BERT, and oscilloscopes.
  • Ability to work effectively on cross-functional teams, communicate clearly, ask questions, document results, learn from senior engineers, and contribute to technical decisions.
  • Experience with scripting or data analysis, preferably using Python, MATLAB, or similar tools, to automate analysis, process results, or generate reports.

Culture & Benefits

  • Innovation-focused environment that values critical thinking, challenging work, and trailblazing ideas.
  • Development support and opportunities to contribute to meaningful work.
  • Collaborative culture focused on supporting colleagues and setting aside ego for the greater good.
  • Flexible time off, wellness resources, and company-sponsored team events.
  • Inclusive workplace with Employee Resource Groups and a commitment to inclusive leadership and equal employment opportunity.
  • Accommodations are available for candidates with disabilities throughout the hiring process.

Hiring process

  • Applications are accepted on an ongoing basis until the position is filled.
  • Reasonable accommodations may be requested for all aspects of the hiring process.

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